Mask ROMs may be mainly classified into a NOR type, a NAND type and a Flat NOR type according to the method of forming a cell array. The mask ROM on which data are written can not be rewritten. The mask ROM is manufactured in the following processes; after the cell array is formed, forming a mask for program in which the cell portion thereof, on which the off-cell will be formed, is open depending on specific applications, and then turning the specific cell to be an off-cell by way of the ion implantation process which uses the mask for program as a mask.
FIG. 1 shows a flat view of the cell array of the conventional NOR-type mask ROM cell array, and FIGS. 3A to 3D show sectional views of the cells for illustrating the method of making a conventional NOR-type mask ROM taken along with line X-X' in FIG. 1.
Referring to FIG. 1 and FIG. 3A, the field oxide film 100 is formed on a semiconductor substrate 1 by way of the device isolation technology, thereby defining the active region 200. Ion for controlling a threshold voltage is implanted into the semiconductor substrate 1 of the active region 200 so as to control the threshold voltage of the cell.
Referring to FIG. 1 and FIG. 3B, a gate oxide film 2 is formed on the semiconductor substrate 1 of the active region 200. A plurality of gate electrodes 3 are formed by depositing polysilicon in the entire structure on which the gate oxide film 2 is formed, and patterning the deposited polysilicon by way of the photolithograph and etching process. A source line 4 and a drain region 5 are formed in the semiconductor substrate 1 around the plurality of the gate electrodes 3 by way of the source and drain ion implantation process which uses the field oxide film 100 and the plurality of the gate electrodes 3 as a mask. As a result of these processes, a cell array is formed in which all the cell 101, 102 and 103 will be driven as an on-cell. In this structure, when a voltage of about 5 V is applied to the gate electrodes 3, all the cell 101, 102 and 103 are driven as the on-cells because a channel region is created on the lower portion of each of the gate electrodes 3 and thus a current turns to flow from the drain region 5 to the source line 4 through the channel region.
Thus, after the cell array is formed, the specific on-cell turns to be an off-cell on customer's request. Thus will be explained by reference to FIG. 3C.
A photoresist 6 is coated on the semiconductor substrate 1 having the plurality of the on-cells 101, 102 and 103. The photoresist 6 is patterned to open the gate electrode 3 of the specific on-cell among the plurality of the on-cells 101, 102 and 103. In order to increase the threshold voltage of the specific on-cell 103, a high concentration of ion for controling the threshold voltage is implanted into the semiconductor substrate 1 underlying the specific on-cell 103 making use of the patterned photoresist 6 as a mask. As a result of these processes, a cell array in which the specific on-cell 103 will be driven as an off-cell 103A is formed. In this structure, when a voltage of about 5 V is applied to the gate electrodes 3, the specific on-cell 103 is driven as the off-cell 103A because a channel region is not created at the lower portion of the gate electrode 3 of the specific on-cell 103 and thus a current does not flow from the drain region 5 to the source line 4.
Referring to FIG. 3D, the patterned photoresist 6 is removed and a thick insulation film 7 is formed on the semiconductor substrate 1 having the on-cells 101 and 102 and the off-cell 103A. A contact hole 9 is formed by removing some portions of the insulation film 7 to expose the drain region 5. A bit line 8 is connected to the drain region 5 through the contact hole 9.
The NOR-type mask ROM which is manufactured according to the conventional method has a low breakdown voltage and a high leakage current at the drain region because it forms the off-cell by implanting a high concentration of ion into the specific on-cell. In addition, when the high concentration of ion is implanted into the specific on-cell so as to form the off-cell, a problem occurs which causes a decrease in the electrical characteristic of the gate oxide because the ion passes through the gate oxide.